The present invention relates to a semiconductor device, liquid crystal display and electronic equipment including these, and, more particularly, to a semiconductor device which is used in an environment exposed to external light.
In general, when a semiconductor circuit is irradiated with light, an electric current is generated in the semiconductor circuit causing a malfunction. Therefore, in order to prevent such occurrence of an electric current due to light in a semiconductor circuit, a mounting form for packaging the semiconductor circuit to shade it from light has been basically adopted. Specifically, an IC chip on which a semiconductor circuit has been formed is mounted on a circuit board such as a molded material to be packaged, and a liquid crystal display is formed by connecting the packaged circuit board and an LCD panel substrate by a heat seal. Alternatively, the liquid crystal display is also formed by connecting a TCP (Tape Carrier Package) in which an IC chip is mounted on a tape with a conductive film to the LCD panel substrate.
In such a mounting form (TCP or packaged circuit board), it is possible to shade light with a molded material at a mounted position.
However, in the form of a mounting module referred to as a COG (Chip On Glass) in which an IC chip is mounted on a side of a LCD panel substrate, the IC chip is mounted on a glass substrate constituting the LCD panel substrate, so that the IC chip can not be packaged and also light can not be shaded.
The reason will be described in more detail using, for example, a liquid crystal drive circuit indicated in FIG. 19. An example of a drive circuit for a COG (Chip On Glass) type of general liquid crystal display is indicated in FIGS. 19A and 19B. A semiconductor circuit used in an environment exposed to external light is hereinafter referred to as xe2x80x9ca principal circuitxe2x80x9d.
In FIG. 19A, a liquid crystal LC is enclosed between a transparent glass substrate 1381 and an LCD panel 1382. A pixel electrode array 1383 (a layer for forming the pixel electrode array) is formed on the glass substrate 1381. In addition, a principal circuit 1384 which is composed of semiconductor elements such as IC chips is also formed on the glass substrate 1381. The principal circuit 1384 includes, for example, a shift register circuit, drive circuit, and power supply circuit Hereinafter, a power supply circuit will be used as an example of this principal circuit.
FIG. 19B shows a partially enlarged portion of the principal circuit shown in FIG. 19A. The principal circuit 1384 is mounted on the glass substrate 1381 through an anisotropic dielectric film (AFC) 1385. Incidentally, a terminal pulled out from the principal circuit 1384 is connected to an external circuit through a flexible connector, which is not shown. Furthermore, the principal circuit 1384 is covered with an opaque resin layer 1386 for circuit protection and an aluminum film for a shield, not shown. Therefore, the principal circuit 1384 is not exposed to direct light from the upper side of FIGS. 19A and 195.
However, a part of the light passing through the LCD panel 1382(for example, light from back light and natural light) irradiates the principal circuit 1384 through the inside of the glass substrate 1381 along a path indicated by the arrow F in FIG. 19A. Thus, carriers based on this light are light excited in addition to a usual drive current in the principal circuit 1384 to generate an unnecessary current (hereinafter, this current is referred to as xe2x80x9ca light excited currentxe2x80x9d).
In order to remove such a disadvantage, it is conceivable to prevent the occurrence of the light excited current described above by shading based on the methods of making the anisotropic conductive film 1385 completely opaque and incorporating pigment in the anisotropic conductive film 1385.
However, when an alignment mark is formed on the surface of the glass substrate 1381 to mount the principal circuit 1384 formed in an IC chip, the alignment mark will be hidden by the anisotropic conductive film 1385 when the IC chip is bonded to the glass substrate, so that it is impossible to align the principal circuit 1384 and the glass substrate 1381.
Moreover, even if the alignment can be performed advantageously by making the anisotropic conductive film 1385 opaque, the electric and chemical characteristics of the semiconductor circuit may deteriorate because of the pigment.
In addition, when the anisotropic conductive film 1385 is depressed in the vertical direction, included metal particles are caused to contact each other to make the depressed portion electrically conductive. For this reason, if a thick anisotropic conductive film 1385 is formed in order to improve the shading function, the mutual contact of the metal particles due to depression is not performed advantageously, so that electric conduction can not be assured.
Next, a circuit configuration of the principal circuit 1384 will be explained. In this case, a power supply circuit constituting the principal circuit typically has a bias circuit with outputs of Vout1 to Vout5 in multiple stages, for example, five stages in order to drive an LCD panel and LCD drive circuit by using a voltage drop method or MLS. Problems when the light excited current described above is generated in the power supply circuit will be explained below with reference to FIGS. 20A and 20B.
FIG. 20A is a circuit diagram showing a conventional power supply circuit. This power supply circuit is composed of a multistage connection circuit in which n-type FETs 1391 to 1395 are connected in multistage, and a bias voltage VDD is applied to one end and a voltage V1 is applied to the other. In addition, voltages Vout0 and Vout5 are output from both ends of this multistage connection circuit. Each of the voltages vout1 to Vout 4 is output through voltage follower circuits A1 to A4 from between a source electrode of FET1391 and a drain electrode of FET1392, between a source electrode of FET1392 and a drain electrode of FET1393, between a source electrode of FET1393 and a drain electrode of FET1394, and between a source electrode of FET1394 and a drain electrode of FET1395, respectively.
FIG. 20B is a cross-sectional view of the structure of a portion of the FETs 1391 and 1392 in the power supply circuit. The FETs 1391 and 1392 are formed on an n-type substrate 1401. P-type well regions 1402 are formed in the n-type substrate 1401, and n-type drain regions 1403 and n-type source regions 1404 are formed in the p-type well regions 1402. Additionally, gate electrodes 1405 are formed above and between the n-type drain regions 1403 and n-type source regions 1404 through an insulation layer not shown. A voltage VDD is applied to the gate electrode 1405 of the FET 1391, n-type drain regions 1403, and the n-type substrate 1401. The VDD is also connected to an output terminal Vout0, and the n-type source region 1404 of the FET 1391 and the n-type drain region 1403 of the FET 1392 are connected to an output terminal Vout1.
The connections between the FETs 1392 and 1393, FETs 1393 and 1394, and FETs 1394 and 1395 are similar to that between the FETs 1391 and 1392, so that the n-type source electrodes of the FETS in the front stages are connected to the n-type drain regions and gate electrodes of the FETS in the later stages. Further, the connection lines for each FET are connected to output terminals Vout2 to Vout4 through the voltage followers A2, A3, and A4, respectively.
FIG. 20B shows that external light having an energy of hxcexd irradiates the back side of the n-type substrate 1401, where h is Planck""s constant and xcexd is c/xcex (c is the velocity of light and xcex is the wavelength). When this external light (hereinafter, external light is referred to as xe2x80x9chxcexdxe2x80x9d) is irradiated, holes are generated in an n-type substrate region 1406 of the n-type substrate 1401 in accordance with wavelength ingredients (hxcexdA) of some range in hxcexd. On the other hand, electrons are generated in the p-type well regions 1402 in accordance with wavelength ingredients (hxcexdB) of some range in hxcexd. As a result, a part of the holes generated in the n-type substrate region 1406 exceeds a boundary between the n-type substrate region 1406 and p-type well region 1402 to reach the p-type well region 1402. Also, a part of the electrons generated in the p-type well region 1402 exceeds the boundary described above to reach n-type substrate region 1406. In FIG. 20B, the light excited electrons generated at this time are designated by xe2x80x9cxe2x88x92xe2x80x9d and the light excited currents in the FET1391 and FET1392 are designated by Ihxcexda1 and Ihxcexda2, respectively.
On the other hand, holes are generated in the n-type drain regions 1403 and the n-type source regions 1404 in accordance with wavelength ingredients (hxcexdC) of some range in hxcexd, and a part of the holes reaches the p-type well regions 1402. In addition, a part of the electrons generated in accordance with the wavelength ingredients of some range indicated by hxcexdB described above reaches the n-type drain regions 1403 and the n-type source regions 1404. In FIG. 20B, light excited currents generated at this time in the FET1391 and FET1392 are indicated by Ihxcexdb and Ihxcexdc, respectively.
FIG. 21A is an equivalent circuit of FIG. 20A when light is not shone and FIG. 21B shows an equivalent circuit of FIG. 20A when light is irradiated. When light is not shone, as shown in FIG. 21A, resistance values of equivalent resistances 1491, 1492, 1493, 1494, and 1495 between the drain and source of the respective FETs 1391 to 1395 are the same, and the values of the voltage drop in each of the FETs 1391 to 1395 are kept constant.
However, when light is shone, as shown in FIG. 21B, equivalent resistances 1491, 1492, 1493, 1494, and 1495 between the drain and source of the respective FETs 1391 to 1395 have substantially different values. That is, the light excited currents Ihxcexdb and Ihxcexdc described above have substantially the same value and flow in a direction such that the currents cancel each other, therefore the resistance values of the equivalent resistances 1491, 1492, 1493, 1494, and 1495 are not affected. However, the light excited currents Ihxcexda1 and Ihxcexda2 described above and further light excited currents Ihxcexda3, Ihxcexda4, and Ihxcexda5 in the FETs 1393, 1394, and 1395 not shown in FIG. 20B flow between the voltage terminal VDD and the p-type well region 1402 of FETs 1391 to 1395, respectively. Accordingly, the balance of the voltage drop between each drain and source of the FETs 1391 to 1395 may collapse, and a problem may occur whereby the voltage between the drain and source becomes larger as a FET is farther from the VDD terminal.
Thus, when light irradiates the FETS 1391 to 1395, the lower the currents flowing through these FETS, the more they increase, making the impedance of each FET uneven, so that each electric potential of Vout0 to Vout5 is caused to fluctuate.
When light is incident on high impedance portions in this manner, currents due to the light may be generated, causing the bias to increase, so that incorrect operation may result, such as the display screen becoming black even though the characters on the screen are visible.
There were problems such that data displayed on a liquid crystal display panel might be transformed, originating from such voltage fluctuation and, further, the voltage of analog circuits in the liquid crystal display might be shifted or an oscillation circuit in the same might be stopped.
Furthermore, if an LCD driver is not provided with light resistance to some extent, light may be incident on the LCD driver, resulting in malfunction, so that the LCD panel may fail to display. On the contrary, there was a problem that the LCD panel can not display without light. In this way, there was a limitation to the display without incorrect operation in the conventional configuration.
In addition, even if the mounting form based on a TCP is adopted, light from the front or side surface can be intercepted as mounting is performed on the front and side surfaces, but light from the rear side can not be intercepted, so that there is the possibility that the same problem as described above may arise.
Moreover, in liquid crystal displays, from the viewpoint of low power consumption, a low voltage specification is likely to become a mainstream, so that a power supply circuit with less voltage fluctuations has been required as small voltage fluctuations may significantly influence display operation in liquid crystal displays on which a power supply is mounted.
The present invention is made to solve the above mentioned technical problems, and the object is to provide a semiconductor device, liquid crystal display, and electronic equipment including these, in which, even if external light irradiates the principal circuit to generate light excited carriers, malfunction can be prevented by canceling or reducing the influence of the light excited carriers without adopting any optical shading means, and display can be well achieved.
The semiconductor device according to the present invention comprises at least one first semiconductor circuit in which a first current excited by external light is generated. Further, the semiconductor device is also provided with at least one second semiconductor circuit which is electrically connected to said first semiconductor circuit and is excited by said external light and in which a second current is generated to cancel a part or all of the voltage fluctuations produced by a current increment of said first current when said external light is shone.
Inventors of the present invention found that, when carriers were excited in a first semiconductor circuit due to irradiation by external light, the influence upon any external circuit or load produced in the first semiconductor circuit could be canceled or reduced by producing a second current to cancel a part or all of the voltage fluctuation produced by the current increment of the first current due to the carriers by another second semiconductor circuit based on the external light, causing the second current to flow into the first semiconductor circuit.
A substrate which constitutes the first semiconductor circuit is generally transparent or translucent, although in some cases it is opaque. In the present application, the term xe2x80x9ctranslucentxe2x80x9d refers to a degree of light penetration in which, when carriers are excited by external light in the first semiconductor circuit, the carriers any influence operation of the first semiconductor circuit. Further, the external light includes both natural and artificial light, and it may be visible or invisible light.
Furthermore, the first semiconductor circuit may include other circuits or elements, such as a MOSFET or MOS diode. The second semiconductor circuit may include other circuits or elements, such as a MOSFET, diode, or p-type or n-type resistor. Therefore, the second semiconductor circuit used when the first semiconductor circuit is composed of MOSFETs is not necessarily to be MOSFETS, but may be diodes.
In addition, the second semiconductor circuit, as described above, produces the second current which cancels the first current produced by the first semiconductor circuit. In this case, the kind of carriers produced as the second current in the second semiconductor circuit may be the same or different kinds of carriers produced as the first current in the first semiconductor circuit. That is, when the first semiconductor circuit produces electrons due to external light, the second semiconductor circuit may produce electrons or holes. On the contrary, when the first semiconductor circuit produces holes due to external light, the second semiconductor circuit may produce holes or electrons. For example, when the first semiconductor circuit is an n-type MOSFET, surplus electrons are produced by irradiation of external light. In this case, the second semiconductor circuit may be, for example, an n-type MOS element or p-type MOS element, so that carriers produced by such an element due to external light cancels the influence (influence on a circuit operation) of the above electrons produced by the n-type MOSFET.
Further, when at least one first semiconductor circuit in a plurality of first semiconductor circuits formed in the semiconductor device is not substantially influenced in a circuit operation by carriers produced due to irradiation of the external light, the first semiconductor circuit is not required to be provided with the second semiconductor circuit. Also, in the case where a plurality of first semiconductor circuits is formed in the semiconductor device, one second semiconductor circuit is not necessarily provided with one first semiconductor circuit. For example, currents produced by plural first semiconductor circuits when irradiated by the external light, may be canceled by the current produced by one second semiconductor circuit. On the contrary, a current produced by one first semiconductor circuit may be canceled by the currents produced by plural second semiconductor circuits.
It is preferable that the first semiconductor circuit according to the present invention increases voltage due to the first current, and that the second semiconductor circuit decreases voltage due to the second current.
When the voltage fluctuation originating from the first current in the first semiconductor circuit is increased, the second semiconductor circuit may be formed to lower the increased voltage. This method prevents the voltage fluctuation in the first semiconductor circuit to maintain the voltage to be constant, so that a malfunction in the first semiconductor circuit can be prevented.
Additionally, it is preferable that the first semiconductor circuit according to the present invention decreases voltage due to the first current and that the second semiconductor circuit increases voltage due to the second current.
When the voltage fluctuation originating from the first current in the first semiconductor circuit is decreased, the second semiconductor circuit may be formed to raise the decreased voltage. This method prevents the voltage fluctuation in the first semiconductor circuit to maintain the voltage to be constant, so that a malfunction in the first semiconductor circuit can be prevented.
Moreover, the second semiconductor circuit in accordance with the present invention is preferably disposed adjacent to the first semiconductor circuit.
When the external light does not irradiate the first semiconductor circuit evenly, the first semiconductor circuit should be located as close as possible to the second semiconductor circuit. This causes the second current to be substantially equal to the first current to ensure the cancellation. However, when the external light is irradiated evenly, the first semiconductor circuit need not be necessarily located close to the second semiconductor circuit for canceling the carriers generated by light excitation in the first semiconductor circuit.
Additionally, it is preferable that the first semiconductor circuit of the present invention may include a high resistance circuit.
In a high resistance circuit, the magnitude of a drive current flowing through the circuit inevitably becomes small. Therefore, when the second semiconductor circuit is not formed, the current which is increased in the circuit becomes large under the influence of the first current, resulting in frequent malfunctions. Then, in the present invention, malfunction based on an overcurrent in a high resistance circuit can be prevented by connecting a second semiconductor circuit to such a high resistance circuit which tends to cause malfunction and by canceling a first current with a second current to reduce the first current due to light excitation in the first semiconductor circuit, i.e., in the high resistance circuit.
Moreover, the first semiconductor circuit according to the present invention preferably includes an operational amplifier. Further, the second semiconductor circuit is preferably connected to an output terminal of the operational amplifier.
When the first semiconductor circuit is composed of an operational amplifier, malfunction of the operational amplifier can be prevented by forming the second semiconductor circuit at its output terminal to cancel the first current in the operational amplifier with the second current.
Furthermore, it is preferable that the first semiconductor circuit according to the present invention further includes a voltage dividing resistance formed at the output terminal of the operational amplifier, and the second current with a magnitude to cancel the voltage fluctuations due to the first current and a current generated at the voltage dividing resistance.
When the output terminal of the operational amplifier is provided with a plurality of resistances, the current which is, in addition to the drive current and the first current, increased due to the resistances is generated in the first semiconductor circuit. For this reason, it is preferred that the second semiconductor circuit have a circuit configuration in which the second current is set so as to cancel the first current and the above increment current.
Furthermore, the first semiconductor circuit according to the present invention preferably includes a dynamic type operation circuit and further charging and discharging means which are connected to an output terminal of the dynamic type operation circuit to charge and discharge current. It is preferred that the second semiconductor circuit be connected to the output terminal and be constituted so as to cause the second current to flow toward the charging and discharging means.
A holding operation is performed by charging an electric charge with the charging and discharging means connected to the output terminal in the dynamic type operation circuit. Thus, when the first current which is excited due to external light is generated in the dynamic type operation circuit during usual operation, an electric charge which is charged because of this first current in the charging and discharging means becomes insufficient. Then, the second current is caused to flow toward this charging and discharging means from the second semiconductor circuit to compensate for the insufficiency of electric charge in the charging and discharging means, so that a malfunction in the dynamic type operation circuit can be prevented.
In addition, the first semiconductor circuit according to the present invention may include switching means. Furthermore, it is preferred that the second semiconductor circuit be provided in the switching means.
When the first current is generated in the switching means, the originally intended ON/OFF operation is not performed exactly, so that various malfunctions are caused, such that an OFF operation is performed in spite of the ON state in the switching means or an ON operation is executed in spite of the OFF state in the switching means. Then, in the present invention, the second semiconductor circuit is provided in the switching means, so that the ON/OFF operation of the switching means can be performed properly and malfunctions, whereby an OFF operation is performed although it is originally intended to perform an ON operation, or an ON operation is performed although it is originally intended to perform an OFF operation.
Additionally, the switching means according to the present invention is preferably formed of a plurality of transmission gates. Further, it is preferred that the second semiconductor circuit be provided in each of the plural transmission gates.
Therefore, second semiconductor circuits are formed for each of the transmission gates, so that stepwise ON/OFF control can be performed.
Furthermore, it is preferred that the second semiconductor circuit according to the present invention be composed of a junction diode.
The second current can be produced by using a simple element such as a junction diode. As a result, it is possible to form the second semiconductor circuit without a complex circuit configuration to contribute to high integration for semiconductor circuit with a reduced occupation area.
In addition, the first semiconductor circuit according to the present invention preferably includes at least one first conductive type transistor. Further, the second semiconductor circuit preferably include at least one second conductive type transistor with conductivity opposite to that of the first conductive type transistor. In addition, it is preferred to form a complementary relationship between the first and second conductive transistors.
When the first semiconductor circuit is a first conductive type transistor, the first conductive type transistor and the second semiconductor circuit to cancel the carriers generated by light excitation of the first conductive type transistor can be formed as a CMOS structure. That is, one CMOS operates as the first semiconductor circuit and the other operates as the second semiconductor circuit.
As an aspect of the present invention, a semiconductor device may comprise a first element of a second conductive type which is formed in a first region of a first conductive type formed in a semiconductor substrate and includes a gate electrode, a source region of a first impurity region of a second conductive type and a drain region of a second impurity region of the second conductive type, the source and drain regions are electrically connected to the first region and has a conductivity opposite to the first region. Further, the semiconductor device comprises a second element which is formed in the semiconductor substrate and includes at least a third impurity region of the first conductive type formed in the vicinity of the first region, the third impurity region being electrically connected to at least the first region.
When the first element is irradiated by external light from the rear side of the semiconductor substrate, carriers are generated in the first region. In addition, carriers are also generated in the third impurity region of the second element. The carriers generated in the first element can be canceled by the carriers in the second element by electrically connecting the first region and the third impurity region. As a result, even when the first element is irradiated by external light, a current in the first element due to the carriers generated in the first element is prevented, so that a malfunction in the first element itself and periphery circuits connected to the first element can be prevented.
At this time, in the first element; although carriers are generated toward both the first impurity region and the first region, these carriers cancel each other in the first region, so that the generation of carriers at junctions of the first and second impurity regions and the first region need not be taken into consideration.
Furthermore, it is necessary to set up groove depths of the first region and the third impurity region so as to cancel each other based on the external light from the front and rear sides of the semiconductor substrate and on spectral sensitivity characteristics corresponding to the kind of external light.
In addition, in the present invention, an external light preferably irradiates from one side of the semiconductor substrate in which the first, second, and third impurity regions are not formed. Further, the first element of the second conductive type is preferably ormed with an n-type transistor. It is preferred that the third impurity region in the second element is formed to be larger than the first or second impurity region in the first element of the second conductive type.
Voltage fluctuation can be prevented without producing an excessive current in the first element by making the carriers generated in the second element greater than or substantially equal to the carriers generated in the first element.
Additionally, in the present invention, an external light preferably irradiates from one side of the semiconductor substrate in which the first, second, and third impurity regions are not formed. Further, the third impurity region in the second element is preferably formed to be such a size that the amount of carriers produced in the third impurity region due to the external light is substantially equal to the amount of carriers produced in the first or second impurity region in the first element of the second conductive type.
This can certainly and substantially cancel the carriers in the first element with the carriers in the second element to prevent voltage fluctuation.
Furthermore, in the present invention, a distance between the third impurity region and the second impurity region is preferably formed in the minimum size under the design rules.
In the cross section structure, the small size of the layout area provides a semiconductor device which is compact, low cost, and has a significantly small chip area.
In addition, the third impurity region of the present invention is preferably formed like a ring around the first and second impurity regions.
Also in the planar structure, the small size of the layout area can realize the optimal shape of the second element to contribute to the small size of the chip area.
Furthermore, in the present invention, an external light preferably irradiates from one side of the semiconductor substrate in which the first, second, and third impurity regions are not formed. Additionally, the first element of the second conductive type is preferably formed with an p-type transistor. Further, the third impurity region in the second element is preferably formed to be smaller than the first or second impurity region in the first element of the second conductive type.
When the first element is formed with the first conductive type, this can make the amounts of carriers generated in the first and second elements substantially equal to perform the cancel operation well.
A liquid crystal display device according to the present invention comprises a liquid crystal display panel including a transparent or translucent substrate. Further, it includes the semiconductor device described above which is formed on the same substrate as the liquid crystal display panel.
When a semiconductor device is formed with a semiconductor chip or the like, the semiconductor device is mounted on a transparent or translucent substrate. In this way, the semiconductor device can be applied to the liquid crystal display device, even when it is mounted on a transparent or translucent substrate.
A liquid crystal display according to the present invention incorporates the semiconductor device described above in a liquid crystal drive circuit which drives pixel electrodes disposed in a matrix-like pattern of a liquid crystal display panel.
Although the semiconductor device described above is to be placed on a substrate, when the substrate is composed of materials suitable for forming a semiconductor layer (such as glass or the like), the semiconductor device is formed directly on the substrate. In this manner, the liquid crystal display device applying the semiconductor device described above can be provided, even when the semiconductor device is formed directly on the substrate.
Note that the semiconductor devices incorporated in a liquid crystal drive circuit are preferably applied to high resistance circuits managing analog signals, such as a power supply circuit, A/D converter, regulator, operational amplifier, DRAM, and SRAM.
The electronic equipment according to the present invention comprises the above described liquid crystal display. This allows malfunctions resulting from voltage fluctuation due to light, such as transformation of characters displayed or halting of an oscillation circuit, to be prevented, thereby providing electronic equipment usable in strong sunlight in summer or under fluorescent lamps.